There has been and continues to be an ever-creasing demand for secondary mass storage peripherals capable of storing ever greater amounts of data in machine-readable form. This desire is coupled to a need to concurrently decrease the average time required to access any particular stored data. In addition, there is the commercial necessity to also reduce the costs associated with such secondary mass data storage devices.
Advances in the development of conventional hard-disk drive type data storage peripherals have been made to generally satisfy, albeit temporarily, the aforementioned desires. The principal gains in total data storage capability come from improvements in the achievement of linear recording bit densities in excess of 14,000 flux changes per inch and track densities of greater than 1,000 per inch. Some gains in the reduction of average access times have come from mechanical improvements in the actuator arm design and construction. Some measurable gains have also been achieved through the utilization of dedicated electronic controllers to manage actuator seek operation and thereby yield a net reduction in the average access time. This use of dedicated hardware is often extended to provide dedicated control of the spin motor rate of rotation and the closed loop actuator control needed to precisely follow a single track. This extended use of dedicated electronic control hardware is generally encouraged since it broadly reduces the cost of manufacture and assembly of disk drives.
Unfortunately, the use of dedicated electronic hardware architecturally reduces the design, initial setup and long term operative flexibility of the disk drive. Unique trimming or tailoring of the electronic and mechanical components of a disk drive, particularly with respect to one another, is sacrificed for the low cost mass producibility of the dedicated electronic control hardware.
The use of non-dedicated electronic hardware in place of dedicated hardware also raises problems. The coordination of multiple active processors in real-time is difficult and the multiplicity of hardware, both of the processors and the coordinating control logic, increases complexity and cost. Alternately, the utilization of a single active processor in place of the dedicated hardware is conventionally avoided due the apparently necessary intricacy of the diverse control functions that must be performed each in real time. Further, each function must be performed in the very limited real-time available every time the function is required to avoid corrupting the subsequent operation of the system.